Huawei’s next AI chip lands months early — you’re still not getting them
At Connect 2026, Huawei moved Ascend 960DT training silicon to Q1 2027 and locked an annual cadence through 2029. Specs and timing are company claims; foundry and memory still decide who can actually buy racks.
What happened
At Huawei Connect 2026 in Shanghai on September 17, rotating chairman David Wang put a public date on silicon Chinese labs have been waiting to plan around. Ascend 960DT, the training-focused part of the next Ascend wave, is now expected in the first quarter of 2027. That is about three quarters earlier than Huawei had previously signaled. Ascend 960PR, aimed at inference, is expected in the third quarter of 2027, about one quarter early. Wang also sketched an annual cadence after that: Ascend 970 in 2028 and Ascend 980 in 2029. For buying teams building 2027 rack plans, a calendar beat matters more than another slide of peak FLOPS.
Company materials and Chinese tech coverage describe roughly doubled performance on the 960 generation versus the parts it replaces. Tom’s Hardware relayed company-disclosed figures for 960DT on the order of 2 PFLOPS FP8 and 4 PFLOPS FP4, with 288 GB of memory and about 9.6 TB/s of bandwidth. Those numbers are company claims, not independent benches. If you follow this from outside China, keep that distinction sharp. Nvidia’s top training stacks still set the ceiling most global labs use as a reference. Huawei is not claiming it just leaped that ceiling. It is claiming Chinese customers will get a dated Ascend path they can put into capacity models.
The locked headline for this pack is blunt for a reason: earlier silicon is not the same as silicon you can buy in volume. Connect week also featured Eric Xu saying domestic demand for Ascend gear already exceeds what Huawei can build, which is why a full overseas push stays limited. Roadmap theater and factory reality collided in the same news cycle. Pulling 960DT into early 2027 is useful if SMIC-class capacity, advanced packaging, and high-bandwidth memory actually clear the queue. It is frustrating if the date arrives and the allocation list does not.
Why it matters
Compared with the West, the story is less “China caught Nvidia” and more “China is trying to make planning possible inside a constrained stack.” US and allied export rules have already reshaped which Nvidia parts Chinese buyers can count on. Licensed H200 shipments into China, where they happen, have been a thin slice of Nvidia’s data-center story in press coverage. Ascend’s job in that environment is not to win a Twitter FLOPS fight. It is to give local hyperscalers and model labs a train-and-serve path that does not depend on hoping the next license window opens on time.
What to watch next is boring and decisive. Watch for independent Ascend 960 measurements when silicon is in third-party hands, not stage demos. Watch HBM and CoWoS-class packaging bottlenecks that sit behind every “card count” announcement. Watch whether 2027 SuperPoD and SuperCluster SKUs show up as orderable configurations or stay keynote art. And watch how Chinese labs split work: train where CUDA access still exists, serve on Ascend when the cluster finally lands. The early date is the news. Getting the chips is still the plot.