SIGNAL / ASIA-PACIFIC

AI Silicon2026-09-23

Alibaba showed Zhenwu V900 — a 2027 chip nobody outside can score yet

T-Head unveiled the Zhenwu V900 at Apsara on September 22, claiming about three times the M890, 216 GB of memory, and clusters of up to 500,000 cards. Alibaba says mass production and commercial release are in the first quarter of 2027. Reuters relayed the company calling it China's most powerful AI chip.

Editorial Take

Believe the first-quarter 2027 ship date, not the dinner-table boast. Naming an unshipped chip 真武 (True Warrior) is great branding; calling it China's most powerful before anyone can rent it is comedy.

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AI Silicon2026-09-23
Alibaba showed Zhenwu V900 — a 2027 chip nobody outside can score yet
T-Head unveiled the Zhenwu V900 at Apsara on September 22, claiming about three times the M890, 216 GB of memory, and clusters of up to 500,000 cards. Alibaba says mass production and commercial release are in the first quarter of 2027. Reuters relayed the company calling it China's most powerful AI chip.
AI Silicon2026-09-23
CXMT's fifth-generation DRAM is in mass production — more dies per wafer, not an HBM fairy tale
Reuters reported on September 20 that CXMT's fifth-generation DRAM platform had entered mass production, with feature spacing claimed at 11.95 nanometres and at least 50% more gross dies per wafer than the prior generation. Two 24-gigabit LPDDR5X parts are already in production. Gross dies are not finished-test yield, and the "on par" line is an executive quote.
Fabs2026-09-23
TSMC's 3nm, 2nm, and CoWoS stay tight as AWS and MediaTek reshuffle the queue
DigiTimes reported from Hsinchu on September 15 that TSMC's 3nm, 2nm, and CoWoS capacity was still short, and that customer changes were reshuffling allocation. Annapurna, MediaTek's Google TPU work, and a TPU v9 split between CoWoS-L and Intel EMIB-T stay reportedly. The full English article was paywalled.
AI Silicon2026-09-23
GMI Cloud wants a $300 million loan to buy Nvidia chips for Thailand
Bloomberg reported on September 17 that Nvidia partner GMI Cloud is seeking roughly $300 million in loans to buy Nvidia chips for a Thailand site tied to ST Telemedia Global Data Centres. The loan is sought, not signed. The report does not confirm a chip generation or a rack count.
AI Silicon2026-09-23
Samsung's HBM4 yield is said to be near 80% — a volume push, not a keynote
Seoul Economic Daily reported on September 20 that industry sources put Samsung's HBM4 yield around 80%, up from under 60% early in mass production. The same piece projects monthly HBM wafer input rising from about 180,000 this year to about 250,000 next year. Counterpoint figures cited there still show SK hynix ahead, 50% to Samsung's 33% in the second quarter.
Fabs2026-09-23
TSMC's Kaohsiung Mini-Loop is homework for CoWoS tools
TrendForce, citing Taiwanese local press, said Kaohsiung's Baipu Industrial Park broke ground on September 21 and that TSMC plans a modular Mini-Loop to validate CoWoS tools before production, with a reported 25% to 50% efficiency aim. ASE's two Baipu buildings and TSMC visits to AUO for glass-core CoPoS stay reportedly.
AI Silicon2026-09-22
China’s memory champion starts making the fancy chips AI needs — most still fail
CXMT began small-batch HBM3E production with 2027 expansion plans; DigiTimes reported ~25% early HBM3 trial yields. Still years behind Korean HBM4 leaders.
AI Silicon2026-09-22
DeepSeek wants a huge Huawei cluster just to answer questions
DeepSeek reportedly plans at least 160,000 Ascend 950DT accelerators in Inner Mongolia for inference, not training. Figures are plans via Bloomberg/TechNode, not a completed deployment.
AI Silicon2026-09-22
Huawei’s next AI chip lands months early — you’re still not getting them
At Connect 2026, Huawei moved Ascend 960DT training silicon to Q1 2027 and locked an annual cadence through 2029. Specs and timing are company claims; foundry and memory still decide who can actually buy racks.
AI Silicon2026-09-22
Huawei's rack bets on light
Huawei unveiled Atlas 960 SuperPoD with near-packaged optics and UnifiedBus, aiming at thousands of linked Ascend 960 processors. Card counts are architecture claims; 3Q27 liquid-cooled timing is a target.
AI Silicon2026-09-22
Huawei can’t make enough AI chips for China alone — a full overseas push stays on ice
Eric Xu said domestic Ascend demand already exceeds Huawei’s ability to build, so a full overseas push stays limited. 2027 training-share claims came without hard figures.
Fabs2026-09-22
China’s top chip factory tries the same power trick Intel and TSMC already use
TrendForce: AMEC and Naura working with SMIC on backside power for N7/N5; AMEC ALD reportedly cleared validation. R&D signal, not volume parity.

Editorial watch

Silicon Radar

GPUs
GPU design wins
CoWoS and HBM coordination remain the key watchpoints for AI accelerator pacing.
CPUs
Server CPU cadence
Power and memory-bandwidth efficiency are shaping next-quarter product windows.
AI Silicon
AI accelerator stack
Interconnect, packaging, and memory integration are moving together across the region.
Fabs
Foundry bottlenecks
Yield quality and lithography sequencing remain tougher signals than headline capex.